Caeleste has designed an experimental 16*16 pixels CMOS image sensor in a 180 nm technology node. The measured read noise on this device is only 0.21 e–RMS, a world record! Reason enough to learn more about this experiment.
Four kinds of pixels
In the image sensor, four kinds of pixels are designed: pixels with thick/thin gate oxide and wide/narrow PMOS amplifier. The noise is measured as a function of the number of read cycles, with or without inversion-accumulation cycling and as function of the chip temperature; as given in Figure 1.
The results can be interpreted as follows:
- Inversion-accumulation cycling helps to “launder” flicker noise to white noise , which can be reduced by oversampling.
- Oversampling reduces the white noise for an oversampling factor around 100. Beyond this factor of 100, integrated dark current shot noise becomes the dominant noise source. However, integrated shot noise is known to decrease with temperature.
- Pixels with thin gate oxide and narrow PMOS amplifier have the lowest noise, because of the largest CVF (charge to voltage conversion factor).
Due to process variation, there are spatial variations in noise performance from pixel to pixel (see Figure 2). For pixels with thin gate oxide and narrow PMOS amplifier, the best value of read noise achieved is 0.21 e-RMS. After previous reported results of 0.50 and 0.34 e–RMS this is a new world record for Caeleste!
The new noise level makes it possible to detect almost certain the arrival of an incident photon.
With these results, Caeleste is in a good position to design and deliver next generation image sensors for exo-planet research and deep space exploration.
 B. Dierickx, N. Ahmed, B. Dupont, “A 0.5 noise electrons RMS CMOS pixel,” Workshop on “CMOS detectors for high performance applications”, Toulouse, Dec. 6, 2011.