New market opportunities in optical communication

In the past, Fiber-optic communication was only used for long distance communication (50 km and beyond). Worldwide, only a limited number of these high-end interface products were required. More recently, companies running large data centers (Facebook, Google, Amazon,…) want to replace the traditional cabling between server racks. Since optical fiber dramatically increases the bandwidth between servers and reduce complexity, it is seen as the solution of the future.

By Sofics

 

The engineers from the Intel groups working on optical communication summarized the potential for Silicon Photonics for different interface distances. The traditional optical communication will be used mainly for the long distances. Silicon photonics will replace the electrical communication for the shorter distances thanks to the combination of low power, low cost and high bandwidth opportunity.
Reducing cost and power while increasing bandwidth

Thus, the optical interconnect suppliers now need to produce a large number of their products. To reduce the cost, they separate the optical parts (laser diodes, photo detectors) from the digital controller circuits. For the electrical ICs regular CMOS technology can be used for mass-production. Moreover, there were several breakthroughs in the last decade, where conventional CMOS processing steps can now be used to create all kinds of optical components like WDM (Wavelength Division Multiplexers), lasers, detectors, waveguides in SOI processes…

From discrete components to Hybrid 2.5D and 3D integration

Both optical and electrical elements are then combined within a single IC package using advanced packing techniques like 2.5D (electronic interposer) and 3D (flip-chip) integration. The hybrid integration allows designers to select the best process option for each function. E.g. the digital functions can be integrated in high end CMOS technology with high performance and smaller size. The photonic die does not benefit from this minimum feature size and can thus be designed in a more mature SOI technology which significantly reduces the total cost.

2.5D integration of optical and electrical IC (CPU) – Fujitsu

 

The electrical IC that is used to control the optical parts and to process the signals before transmitting or after receiving is manufactured using advanced CMOS technology like 28nm. The interfaces consist of high speed (10Gbps, 25Gbps or even 56Gbps) SerDes-type circuits.

To create such high-speed differential circuits, designers utilize the thin oxide transistors. However, those transistors are very sensitive and can easily be damaged during transient events like electrostatic discharge (ESD).

Optical links need custom ESD clamps

In the last 10 years, several companies that are designing interface products and control IC’s for Silicon Photonics contacted Sofics for support. In those projects Sofics engineers focused on protecting the high-speed interfaces (Tx, Rx) on the electrical die as well as protection of the low voltage power pads.

Despite the fact that the sensitive pads are not connected outside of the single IC package, they can still receive ESD stress during assembly. Therefore, adequate protection clamps need to be inserted at the bond pads. On the other hand, for signal integrity, it is important to limit the capacitance between the interface pads and the supply lines.

For these ESD challenges, Sofics engineers propose adequate solutions. For instance, the development of ESD protection with parasitic capacitance below 15fF, ten times lower than the typical low-cap ESD protection devices in 28nm CMOS.

Sofics presented these results at the TSMC OIP conference in Santa Clara (September 13) and during the ECOC conference in Goteburg (September 17-21). More information about the specific protection concepts.

The capacitance value in function of the bias voltage at the pad. On the right side, the ESD layout is shown for the 28nm project. The total area for the ESD protection clamp is 683.75 um².